首页 | 本学科首页   官方微博 | 高级检索  
     检索      

一种带有改进的25%占空比本振产生电路的WCDMA/GSM高线性度接收机射频前端分析与设计
引用本文:胡嵩,李伟男,黄煜梅,洪志良.一种带有改进的25%占空比本振产生电路的WCDMA/GSM高线性度接收机射频前端分析与设计[J].半导体学报,2012,33(2):025007-10.
作者姓名:胡嵩  李伟男  黄煜梅  洪志良
基金项目:Project supported by the National Science and Technology Major Project of China (No. 2009ZX01031-003-002) and the National High Technology Research and Development Program of China (No. 2009AA011605).
摘    要:本文提出了一种满足WCDMA/GSM系统要求的全集成接收机射频前端。WCDMA模式下无需声表面波滤波器。为了提高包括IP3和IP2指标在内的线性度性能,射频前端包括电容减敏的多栅低噪声放大器、带有本文提出的IP2校准电路的电流模式无源混频器以及似Tow-Thomas结构的双二阶可重构跨阻放大器。本文提出了一种新的低功耗、低相噪、可产生四相25%占空比本振信号的多模分频器。同时,本文通过采用带有片上电阻的恒定gm偏置电路,减小工艺和温度对转换增益的影响。本文中的射频前端电路集成在一个0.13um CMOS工艺下实现的带有片上频率综合器的接收机中。测试结果显示,在这个高线性度射频前端的帮助下,对于所有的模式和频带,接收机可以获得-6dBm的IIP3和至少 60dBm的IIP2。

关 键 词:WCDMA  GSM系统  高线性度  射频前端  接收机  占空比  发生器  设计
收稿时间:8/8/2011 10:36:20 PM
修稿时间:9/8/2011 10:13:43 PM

Analysis and design of a high-linearity receiver RF front-end with an improved 25%-duty-cycle LO generator for WCDMA/GSM applications
Hu Song,Li Weinan,Huang Yumei and Hong Zhiliang.Analysis and design of a high-linearity receiver RF front-end with an improved 25%-duty-cycle LO generator for WCDMA/GSM applications[J].Chinese Journal of Semiconductors,2012,33(2):025007-10.
Authors:Hu Song  Li Weinan  Huang Yumei and Hong Zhiliang
Institution:State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
Abstract:A fully integrated receiver RF front-end that meets WCDMA/GSM system requirements is presented. It supports SAW-less operation for WCDMA. To improve the linearity in terms of both IP3 and IP2, the RF front-end is comprised of multiple-gated LNAs with capacitive desensitization, current-mode passive mixers with the proposed IP2 calibration circuit and reconfigurable Tow-Thomas-like biquad TIAs. A new power-saving multi-mode divider with low phase noise is proposed to provide the 4-phase 25%-duty-cycle LO. In addition, a constant-gm biasing with an on-chip resistor is adopted to make the conversion gain invulnerable to the process and temperature variations of the transimpedance. This RF front-end is integrated in a receiver with an on-chip frequency synthesizer in 0.13 m CMOS. The measurement results show that owing to this high-linearity RF front-end, the receiver achieves ??6 dBm IIP3 and better than +60 dBm IIP2 for all modes and bands.
Keywords:receiver  multi-mode  multi-band  SAW-less  IP2 calibration  25% duty-cycle
本文献已被 维普 等数据库收录!
点击此处可从《半导体学报》浏览原始摘要信息
点击此处可从《半导体学报》下载免费的PDF全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号