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基于InP-DHBT的20 GHz的超高速比较器
引用本文:黄振兴,周磊,苏永波,金智.基于InP-DHBT的20 GHz的超高速比较器[J].半导体学报,2012,33(7):075003-5.
作者姓名:黄振兴  周磊  苏永波  金智
作者单位:中国科学院微电子研究所,中国科学院微电子研究所,中国科学院微电子研究所,中国科学院微电子研究所
基金项目:国家重点基础研究发展计划(973计划)
摘    要:采用截止频率fT为170 GHz的InP-DHBT工艺,我们设计并制作了一个超高速主从电压比较器。整个芯片的面积(包括焊盘)是0.75?1.04 mm2,在-4V的单电源电压下消耗的功耗是440mW(不包括时钟产生部分)。整个芯片包含了77个InP DHBTs。比较器的尼奎斯特测试到了20GHz,输入灵敏度在10 GHz采样率的时候是6mV,在20 GHz的时候是16 mV。据我们所知,这在国内还是第一次在单片上集成超过70个InP DHBTs的电路,也是目前国内具有最高采样率的比较器。

关 键 词:DHBT  InP基  超高速  双异质结双极晶体管  电压比较电路  GHz  截止频率  电流增益
修稿时间:3/26/2012 3:55:42 PM

A 20-GHz ultra-high-speed InP DHBT comparator
Huang Zhenxing,Zhou Lei,Su Yongbo and Jin Zhi.A 20-GHz ultra-high-speed InP DHBT comparator[J].Chinese Journal of Semiconductors,2012,33(7):075003-5.
Authors:Huang Zhenxing  Zhou Lei  Su Yongbo and Jin Zhi
Affiliation:Institute of Microelectronics, Chinese Academy of Sciences,Institute of Microelectronics, Chinese Academy of Sciences,Institute of Microelectronics, Chinese Academy of Sciences,Institute of Microelectronics, Chinese Academy of Sciences
Abstract:An ultra-high-speed, master-slave voltage comparator circuit is designed and fabricated in InP/GaInAs double heterojunction bipolar transistors (DHBTs) technology with current gain cutoff frequency fT of 170 GHz. The complete chip die, including bondpads, is 0.75?1.04 mm2. It consumes 440 mW from a single -4V power supply, excluding clock part. 77 DHBTs have been used in the monolithic comparator. A full Nyquist test has been performed up to 20GHz, with the input sensitivity varying from 6 mV at 10 GHz to 16 mV at 20 GHz. To our knowledge, this is the first InP based integrated circuit including more than 70 DHBTs, and it achieves the highest sampling rate on the mainland of China.
Keywords:InP  comparator  HBT  emitter coupled logic  latched comparator  sensitivity
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