| 超低比导通电阻SOI双栅槽型MOSFET |
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| 引用本文： | 雷天飞,罗小蓉,葛锐,陈曦,王元刚,姚国亮,蒋永恒,张波,李肇基.超低比导通电阻SOI双栅槽型MOSFET[J].半导体学报,2011,32(10):104004-4. |
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| 作者姓名： | 雷天飞 罗小蓉 葛锐 陈曦 王元刚 姚国亮 蒋永恒 张波 李肇基 |
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| 作者单位： | 成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室,成都电子科技大学微电子与固体电子学院电子薄膜与集成器件国家重点实验室 |
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| 基金项目： | Project supported by the National Natural Science Foundation of China (Nos. 60806025, 60976060), the National Key Laboratory of Analogy Integrated Circuit (No. 9140C090304110C0905), and the State Key Laboratory of Electronic Thin Films and Integrated Devices, China (No. CXJJ201004). |
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| 摘 要： | 本文提出了超低比导通电阻(Ron,sp) SOI双栅槽型MOSFET(DG Trench MOSFET)。此MOSFET的特点是拥有双栅和一个氧化物槽：氧化物槽位于漂移区，一个槽栅嵌入氧化物槽，另一个槽栅延伸到埋氧层。首先，双栅依靠形成双导电沟道来减小Ron,sp；其次，氧化物槽不仅折叠漂移区，而且调制电场，从而减小元胞尺寸，增大击穿电压。当DG Trench MOSFET的半个元胞尺寸为3μm时，它的击穿电压为93V，Ron,sp为51.8mΩ?mm2。与SOI单栅MOSFET(SG MOSFET)和SOI单栅槽型MOSFET(SG Trench MOSFET)相比，在相同的BV下，DG Trench MOSFET的Ron,sp分别地降低了63.3%和33.8%。
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| 关 键 词： | MOSFET 沟槽型 SOI 双栅 体电阻 绝缘体上硅 氧化沟 击穿电压 |
| 收稿时间： | 4/27/2011 5:34:29 PM |
| 修稿时间： | 6/9/2011 8:46:13 PM |
Ultra-low specific on-resistance SOI double-gate trench-type MOSFET |
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| Lei Tianfei,Luo Xiaorong,Ge Rui,Chen Xi,Wang Yuangang,Yao Guoliang,Jiang Yongheng,Zhang Bo and Li Zhaoji.Ultra-low specific on-resistance SOI double-gate trench-type MOSFET[J].Chinese Journal of Semiconductors,2011,32(10):104004-4. |
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| Authors: | Lei Tianfei Luo Xiaorong Ge Rui Chen Xi Wang Yuangang Yao Guoliang Jiang Yongheng Zhang Bo and Li Zhaoji |
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| Affiliation: | State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China; No. 24 Research Institute of China Electronics Technology Group Corporation, Chongqing 400060, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China |
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| Abstract: | |
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| Keywords: | double gates trench specific on-resistance breakdown voltage |
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