基于FPGA的SDRAM读写双口控制器设计

在研究了SDRAM工作特性的基础上,提出了利用FPGA将单片SDRAM作为乒乓RAM的双口接口设计。采用ALTERA公司的EP1C6Q240C8和HYNIX的HY57V161610DTC-8，将FPGA作为主控制器，并在其中配置两块删分别作为SDRAM的输入、输出缓冲区。前者接收外设慢速数据流，经处理后写入到SDRAM，后者读取SDRAM中数据,为外围高速设备提供高速数据流。高速数据流按自定义数据包间续发送，在此问隔中执行慢速数据流写入SDRAM和自动刷新SDRAM的操作。

Design of Double Interface Controller on SDRAM with FPGA

A control scheme of double interfaces with one single SDRAM controlled by FPGA is proposed based on the working features of SDRAM. The FPGA, EPIC6Q240C8 of ALTERA CO. and the SDRAM, HY57V161610DTC-8 of HYNIX CO. are employed. Two buffers in FPGA are allocated as the importer and exporter for SDRAM. The exporter using an user-defined data package provides high speed data stream by spells for the high speed peripheral equipments which got from the SDRAM. During these intervals the importer receives the low speed data from the outer and writes them into the SDRAM.