| MOS器件栅介质层陷阱的表征方法 |
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| 引用本文： | 许中广,霍宗亮,张满红,王琴,刘璟,朱晨昕,郑志威,王晨杰,刘明.MOS器件栅介质层陷阱的表征方法[J].微电子学,2011,41(5). |
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| 作者姓名： | 许中广 霍宗亮 张满红 王琴 刘璟 朱晨昕 郑志威 王晨杰 刘明 |
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| 作者单位： | 中国科学院微电子研究所纳米加工与新器件集成技术实验室,北京,100029 |
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| 基金项目： | 国家重点基础研究发展(973)计划基金资助项目(2010CB934200); 国家自然科学基金资助项目(60825403) |
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| 摘 要： | 随着MOS器件按比例缩小,MOS器件的可靠性问题正成为限制器件性能的一大瓶颈。作为可靠性研究的一个热点和难点,MOS器件栅介质可靠性的研究一直是学术界和工业界研究的重点。普遍认为,栅介质中的陷阱是引起栅介质退化乃至击穿的主要因素,对栅介质中陷阱信息的准确提取和分析将有助于器件性能的优化、器件寿命的预测等。针对几十年来研究人员提出的各种陷阱表征方法,在简单介绍栅介质中陷阱相关知识的基础上,对已有的界面陷阱和氧化层陷阱表征方法进行系统的调查总结和分析,详细阐述了表征技术的新进展。
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| 关 键 词： | MOS器件 栅介质 可靠性 缺陷表征 界面陷阱 氧化层陷阱 |
Techniques for Characterization of Traps in Dielectric Stacks of MOSFET |
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| XU Zhongguang,HUO Zongliang,ZHANG Manhong,WANG Qin,LIU Jing,ZHU Chenxin,ZHENG Zhiwei,WANG Chenjie,LIU Ming.Techniques for Characterization of Traps in Dielectric Stacks of MOSFET[J].Microelectronics,2011,41(5). |
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| Authors: | XU Zhongguang HUO Zongliang ZHANG Manhong WANG Qin LIU Jing ZHU Chenxin ZHENG Zhiwei WANG Chenjie LIU Ming |
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| Affiliation: | XU Zhongguang,HUO Zongliang,ZHANG Manhong,WANG Qin,LIU Jing,ZHU Chenxin,ZHENG Zhiwei,WANG Chenjie,LIU Ming(Key Laboratory of Nano-fabrication and Novel Devices Integrated Technology,Institute of Microelectronics,The Chinese Academy of Sciences,Beijing 100029,P.R.China) |
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| Abstract: | With the scaling down of MOSFET,reliability of dielectric stacks is becoming a bottleneck to performance improvement of MOS devices.It is widely accepted that identifying trap configuration is essential for understanding performance and reliability of MOS devices.Accurate characterization of traps in dielectric stacks is helpful to optimizing device performance and predicting device lifetime.Fundamental knowledge of traps was introduced,and different methods for characterization of interface-and oxide-traps... |
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| Keywords: | MOS device Dielectric stack Reliability Defect characterization Interface trap Oxide trap |
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