| 算术运算的VHDL描述方法探讨 |
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| 引用本文： | 方怡冰.算术运算的VHDL描述方法探讨[J].电气电子教学学报,2007,29(1):91-94. |
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| 作者姓名： | 方怡冰 |
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| 作者单位： | 集美大学,信息工程学院,福建,厦门,361021 |
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| 摘 要： | 针对在VHDL语言教学过程中,如何进行算术运算的VHDL描述问题进行了探讨.文中首先论述了VHDL语言描述算术运算的局限性;重点阐述了加运算、减运算、乘运算、除运算、取模运算、取余运算的VHDL描述方法;由于设计的结果是一个专用的算式电路,不运行任何程序,工作的可靠性和稳定性都优于用CPU设计.
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| 关 键 词： | 算术运算 VHDL描述 程序 |
| 文章编号： | 1008-0686（2007）01-0091-04 |
| 收稿时间： | 2006-09-29 |
| 修稿时间： | 2006-12-22 |
Discuss in Arithmetic Cperation in VHDL Described Method |
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| FANG Yi-bin.Discuss in Arithmetic Cperation in VHDL Described Method[J].Journal of Electrical & Electronic Engineering Education,2007,29(1):91-94. |
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| Authors: | FANG Yi-bin |
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| Affiliation: | School of Information Engineering, Jimei University, Xiamen 361021, China |
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| Abstract: | This paper gives some discussion about the teaching experience in arithmetic operation in VHDL described method. Localization about arithmetic operation in VHDL is given first. Then the paper focuses on the method of the demonstration of plus operation, subtract operation, multiply operation, divide operation, modular arithmetic, remaining in VHDL. Owing to the result of the design is a special arithmetic circuit, no program is run, reliability and stability is better then the designing by CPU. |
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| Keywords: | arithmetic operation VHDL describe program |
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