基于片上系统的时钟复位设计

从方法优化和电路设计入手,提出了基于片上系统(SOC)的复位方法和时钟复位电路.设计了片外按键复位电路、片内上电电路、晶振控制电路、片内RC低频时钟电路、槽脉冲产生电路、分频延时电路、时钟切换电路及异步复位同步释放电路等电路模块.以上电路模块构成了片上系统的时钟复位电路,形成了特定的电路时钟复位系统.该时钟复位系统将片外按键复位与片内上电复位结合起来,形成多重复位设计,相比单纯按键复位更智能,相比单纯上电复位则更可靠.另外,该时钟复位系统还采用了片内RC振荡时钟电路等一系列电路,借助片内RC时钟实现对芯片的延时复位,进而在保证复位期间寄存器得到正确初始化的同时,还使得芯片能够始终处在稳定的晶振时钟下正常工作.相比传统的时钟复位电路,该时钟复位系统既便捷,又保证了系统初始化和系统工作的可靠性.

Clock and Reset Design Based on SOC Chip System

Starting from optimization of methodologies and circuit design, a reset method and a clock reset circuit based on system on chip(SOC) was proposed. The design of modules including off chip button reset circuit, on chip power on circuit, crystal oscillator control circuit, on chip RC low frequency clock circuit, channel pulse generation circuit, frequency division delay circuit, clock switching circuit and asynchronous reset synchronous release circuit were presented. A specific reset method was established and a clock reset circuit applicable to SOC was formed on the basis of the circuit modules above. The clock reset system combines off chip reset button and on chip power on reset, forming a multiple reset design, which is more intelligent than using single reset button and of more reliability compared to using power on reset only. In addition, an on chip RC clock oscillation circuit was used in the clock reset circuit to realize the chip delay reset, therefore not only the correct initialization of registers was guaranteed during the reset period, but also consistent normal working condition of the whole chip under the stable oscillating clock was ensured. Compared with the traditional clock reset circuit, the clock reset system is convenient and guarantees the reliability of system initialization and operation.