Pin-cap和NDW对延迟计算精度的影响

由于仿真工具本身及外部一些因素的限制,在特征化时序库时不可能产生出与理想器件完全一致的时序库延时计算模型。为了建立更为精确的延时计算模型,cadence将多输入引脚电容模型与规范化驱动波形的概念引入到有效电流源模型。文中通过使用时序分析工具对时序库进行关键路径仿真,并将分析结果与Spectre仿真结果进行对比,研究在ECSM中标准单元的接收端建立多输入引脚电容模型所带来的时序差异,以及NDW对延迟计算精度的影响。研究表明,ECSM 库若同时结合pin-cap与NDW的使用,将会更有利于延迟的精确计算,从而得到更为实际的时序分析结果。

Effects of Pin-cap and NDW on Delay Calculation Precision

Due to the constraints from the simulation tool and some external factors,it is impossible to create a liberty delay calculation model which is fully consistent with the actual device when characterizing timing library.In order to build a more accurate delay calculation model,the concept of Multiple Input Pin Cap Model (pin cap) and normalized driver waveform (NDW) is introduced into the Effective Current Source Model (ECSM) by Cadence.This paper is intended to study the difference between timing correlation results caused by the multiple input pin cap model and the NDW in ECSM,by means of performing accurate comparison of STA timing results with Spice path based simulation.Research shows that the ECSM library,if combined with pin cap and NDW,will be more conducive to the accurate calculation of delay,thus getting more credible timing analysis results.