On the intrinsic limits of pentacene field-effect transistors

Performance limits for pentacene based field-effect transistors are investigated using single- and polycrystalline devices. Whereas the charge transport in single crystalline devices is band-like with mobilities up to 10⁵ cm²/V s at low temperatures, temperature-independent or thermally activated charge transport can be observed in polycrystalline thin film transistors depending on the growth conditions. Trapping and grain boundary effects significantly influence the temperature dependence of the field-effect mobility. Furthermore, the device performance of p-channel transistors (mobility, on/off ratio, sub-threshold swing) decreases slightly with increasing trap densities. However, the formation of an electron accumulation layer (n-channel) is significantly stronger affected by trapping processes in the thin film devices. Single crystalline p-channel devices exhibit at room temperature mobilities as high as 3.2 cm²/V s, on/off-ratios exceeding 10⁹, and sub-threshold swings as low as 60 mV/decade. Slightly diminished values are obtained for transistors working as n-channel devices (2 cm²/V s, 10⁸, and 150 mV/decade).