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Less occupied and ultra-low noise LDO design |
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| Authors: | Jiang-peng Wang Jin-guang Jiang Xi-feng Zhou |
| Affiliation: | 1. School of Electronic Information, Wuhan University, 129 Luoyu Road, Wuhan, China 2. International School of Software, Wuhan University, Wuhan, China 3. Suzhou Research Institute of Wuhan University, Suzhou, China 4. Silicon Electronic Technology Co., Ltd. Changzhou, Building 5, Jiangsu Province Administration Center, Wujin District, Changzhou, China 5. School of Physics and Technology, Wuhan University, 129 Luoyu Road, Wuhan, China |
| Abstract: | This paper presents a less-occupied and ultra-low noise LDO structure. This structure can achieve ultra-low noise performance without large filter capacitor by incorporating a capacitance amplifying circuit in the structure of LDO with pre-regulation. A large amount of chip area will be saved in this structure. A novel LDO in proposed structure is realized under SMIC 0.18 μm process. The experiment results show that proposed LDO structure can achieve a total output noise of 25.5 μV between 10 Hz and 1 kHz and 56.4 μV between 1 kHz and 1 MHz with a filter capacitor of 5pF. PSR is ?71.6 dB under low frequency until 49 kHz and at least ?65.7 dB under entire frequency range. |
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