基于可编程硬件的虚拟路由器数据平面设计与实现

未来网络体系结构创新和验证亟需建设虚拟化网络实验平台,虚拟路由器作为其中的核心组网设备,其结构和性能决定了实验平台的灵活性和承载能力.本文提出基于并行流水线的虚拟路由器数据平面结构,结合并行包分类和异步多指针轮询调度机制,在同一物理底层上实现了多个相互隔离的并行异构路由器.本设计在可编程硬件上进行了原型实现,并结合商用及软件路由器在真实的网络环境中部署、测试与实验.实验结果表明与传统单流水线结构相比,本设计能以更高灵活性和并行性支持异构的路由器实例独立运行;在逻辑资源开销和延时特性未显著增加的情况下,并行虚拟路由器可以达到与硬件可比的线速转发能力.

Design on Data Plane of Programmable Hardware-Based Virtual Router

Building virtualized network experiment platform is considered to be an effective method for network architecture innovation and validation.The structure and performance of the virtual router determines the capacity and flexibility of network experiment platform.In this article,the virtual router's data-plane architecture with parallel pipelines is presented.Combined with parallel packet classification and asynchronous pointer polling scheduling mechanisms,we implement isolated heterogeneous router instances on the same physical underlying.Prototype system is deployed on programmable hardware which is tested with software routers in real network environment.Experimental results show that compared with traditional single-pipeline architecture,our design get greater flexibility and parallelism and supports heterogeneous router instances operating independently;logic resources overhead and delay characteristics are not significantly increased while each router instance achieves wire-speed forwarding which is comparable with that hardware.