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基于FPGA的高重复率距离门控电路实现
引用本文:吴志波,张忠萍,陈菊平.基于FPGA的高重复率距离门控电路实现[J].电子学报,2010,38(4):919-0922.
作者姓名:吴志波  张忠萍  陈菊平
作者单位:中国科学院上海天文台,上海,200030
基金项目:国家自然科学基金委员会—中国科学院天文联合基金(No.10778634)
摘    要: 传统的距离门控电路多采用分立元器件,工作频率和控制精度均十分有限,难于满足重复频率高的测距需求。通过分析高重复率距离门控的时序,提出并实现了一种基于FPGA的高重复率距离门控电路方法。该方法充分发挥了FPGA在运算、存储、时钟管理等方面的优势:采用倍频模块产生的200MHz作为时钟基准,其门控输出分辨率达5ns;利用增强型并口(Enhanced Parallel Port,简称EPP)方式进行门控数据传输,以确保2kHz的高速门控信号输出。完成的距离门控板在上海天文台的高重频(2kHz)卫星激光测距(Satellite Laser Ranging,简称SLR)实验中获得应用,使上海天文台成为国际上少数掌握高重频SLR技术的台站之一。

关 键 词:卫星激光测距  FPGA  距离门控电路  高重复率

The Implementation of Range-Gate Control Circuit with High-Repetition-Rate Based on FPGA
WU Zhi-bo,ZHANG Zhong-ping,CHEN Ju-ping.The Implementation of Range-Gate Control Circuit with High-Repetition-Rate Based on FPGA[J].Acta Electronica Sinica,2010,38(4):919-0922.
Authors:WU Zhi-bo  ZHANG Zhong-ping  CHEN Ju-ping
Affiliation:Shanghai Astronomical Observatory;Chinese Academy of Sciences;Shanghai 200030;China
Abstract:The operating frequency and precision of traditional range-gate control circuits designed with discrete components are hard to satisfy the demand of high-repetition-rate measurement.By analyzing the timing sequences of high-repetitionrate range gate,a method based on FPGA is proposed and implemented.This method makes full use of FPGA advantages at calculating,storage and clock managing,200MHz Clock generated by DCM(Digital Clock Manager) results in the circuit with 5ns resolution and transferring range-gate...
Keywords:satellite laser ranging  FPGA  range-gate control circuit  high repetition rate  
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