基于FPGA的宽带数字信道化接收机的设计

提出一种基于多相滤波器组的宽带数字信道化接收机的实现结构和设计方法,该方法可以满足侦察接收机宽频段覆盖、高灵敏度、高截获概率和实时处理能力,较好地解决高速A/D芯片与低速信号处理器之间的矛盾.用基于CORDIC算法和一阶相位差分算法进行瞬时测频.对系统中的每个功能模块进行了基于FPGA的设计与实现,从signaltab中验证了该方法的正确性.

A Design Method of Digital Channelized Wideband Receiver Based on FPGA

A design method and structural implementation of wideband digital ehannelized receiver based on poly-phase filters is introduced. The method satisfies the requirements of widehand frequency coverage, has high sensitivity, high probability of inter-ception and full or near real-time operation for receiver, and solves the contradiction between the high speed A/D chip and low-speed digital signal processor. We propose one instantaneous frequency measurement method based on Cordic algorithm and one-or-der phase difference algorithm. All functional modules of the digital channelized receiver are implemented on FPGA device, the re-suit of signal receive proves this method is effective.