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基于0.13 μm CMOS工艺的低电压高速1:2分频器设计
引用本文:夏辉.基于0.13 μm CMOS工艺的低电压高速1:2分频器设计[J].电子测试,2011(1):83-86.
作者姓名:夏辉
作者单位:92728部队;
摘    要:在光纤传输系统中,分频器是工作在最高频率的电路之一,起着至关重要的作用,本文就采用了由锁存器构成的数字1:2分频器.采用UMC 0.13μm CMOS工艺,设计了电源电压为1V,工作频率范围为5~20GHz的1:2分频器电路.该电路由基本分频器单元以及输入输出缓冲组成.基本分频器单元采用单端动态负载锁存器.整体电路功耗...

关 键 词:CMOS  低电压  分频器  动态负载

Research on low voltage high speed 1:2 frequency divider based on 0.13μm CMOS
Xia Hui.Research on low voltage high speed 1:2 frequency divider based on 0.13μm CMOS[J].Electronic Test,2011(1):83-86.
Authors:Xia Hui
Affiliation:Xia Hui (92728 Army,200436)
Abstract:In optical fiber transmission system, is working at the highest frequency divider circuit, one plays a vital role, this paper uses the figures from the latch constitute a 1:2 divider. This paper describes a 1:2 frequency divider, which works on the power supply voltage of 1V and the frequency range of 5GHz to 20GHz, using UMC 0.13μm CMOS process. The concrete circuits are composed of frequency divider and I/O buffers. A singe-end dynamic loading latch is employed as basic cell. The total power consumption of the chip is lower than 17mW, and core power consumption is 2mW ,and die area equals 0.412mm×0.337mm. Through the system test shows that the design can meet the design requirements.
Keywords:CMOS  low voltage  frequency divider  dynamic loading  
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