| 基于VHDL的TPC译码器设计 |
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| 引用本文： | 向冰.基于VHDL的TPC译码器设计[J].现代电子技术,2010,33(7):73-76. |
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| 作者姓名： | 向冰 |
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| 作者单位： | 中国空空导弹研究院,河南,洛阳,471009 |
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| 摘 要： | Turbo乘积码是一种性能卓越的前向纠错码,具有译码复杂度低,且在低信噪比时可以获得近似最优的性能。介绍基于Chase算法的Turbo乘积码软入软出（SISO）迭代译码算法,提出基于VHDL硬件描述语言的TPC译码器设计方案,并在FPGA芯片上进行了仿真和验证。仿真结果证明该译码器有很大的实用性和灵活性。
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| 关 键 词： | TPC码 软判决译码 迭代译码 VHDL FPGA |
Design of TPC Decoder Based on VHDL |
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| XIANG Bing.Design of TPC Decoder Based on VHDL[J].Modern Electronic Technique,2010,33(7):73-76. |
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| Authors: | XIANG Bing |
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| Affiliation: | XIANG Bing(China Airborne Missile Academy,Luoyang 471009,China) |
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| Abstract: | Turbo product code(TPC) is a kind of forward error correction codes with excellent performance.TPC has low decoding complexity and achieves near-optimum performances at low signal-to-noise ratio.The soft in soft out(SISO) iteration decoding algorithm for Turbo product code which is based on Chase algorithm and a method of hardware design for Turbo product code iterative decoder based on VHDL are introduced.The decoder is simulated and implemented on FPGA circuit.The simulation results prove that the decoder... |
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| Keywords: | VHDL FPGA |
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