| Tiger SHARC DSP在雷达信号处理中的应用 |
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| 引用本文： | 张雄飞.Tiger SHARC DSP在雷达信号处理中的应用[J].现代电子技术,2005,28(9):82-84. |
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| 作者姓名： | 张雄飞 |
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| 作者单位： | 中国电子科技集团,第20研究所,陕西,西安,710068 |
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| 摘 要： | ADSP Tiger SHARC 101S数字处理器是美国Analog Device公司最新推出的定／浮点信号处理器，该处理器对大的信号处理任务和通信结构进行了专门的优化，能够方便实现多片并行处理系统扩展。介绍了Tiger SHARC DSP芯片的主要特点，并用多片Tiger SHARC DSP芯片构成了一个典型的通用雷达信号处理系统，估计了系统的运算量，讨论了DSP复位波形的要求以及与CPLD配置芯片的关系，说明了DSP的电源供电和功耗的计算方法。该系统具有结构灵活、可编程性好、可扩展性强的特点。
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| 关 键 词： | Tiger SHARC DSP 信号处理 FPGA 运算量 |
| 文章编号： | 1004-373X(2005)09-082-02 |
| 修稿时间： | 2005年1月10日 |
Application of Tiger SHARC DSP in Radar Signal Processing |
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| Zhang XiongFei.Application of Tiger SHARC DSP in Radar Signal Processing[J].Modern Electronic Technique,2005,28(9):82-84. |
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| Authors: | Zhang XiongFei |
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| Abstract: | ADSP Tiger SHARC 101S digital processor is the latest highperformance fixed/floating point DSP by Analog Device that special optimization is adapted to use communication structure and work in great signal procession task,which makes it easy to realize paratactic multiprocessors system.The mainly characteristic of Tiger SHARC DSP is presented in this paper,we design a typical and allpurpose radar signal processing system based on multiple Tiger SHARC DSP chips,an emphasis on evaluation of system computational burden is put,the requirement of reset of DSP and its relation with configuration chip of CPLD are discussed,the power supply and consumption are accounted,the module has the advantages of flexible configuration,high programmable ability and expansibility. |
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| Keywords: | Tiger SHARC DSP signal processing FPGA computational burden |
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