| FPGA芯片内数字时钟管理器的设计与实现 |
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| 引用本文： | 李文昌,李平,杨志明,李威,王鲁豫.FPGA芯片内数字时钟管理器的设计与实现[J].半导体技术,2011,36(11):848-852. |
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| 作者姓名： | 李文昌 李平 杨志明 李威 王鲁豫 |
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| 作者单位： | 电子科技大学电子薄膜与集成器件国家重点实验室,成都,610054;电子科技大学电子薄膜与集成器件国家重点实验室,成都610054;成都华微电子科技有限公司,成都 610041;成都华微电子科技有限公司,成都,610041 |
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| 摘 要： | 在FPGA芯片内,数字时钟管理器(DCM)不可或缺,DCM主要完成去时钟偏移、频率综合和相位调整的功能,其分别由延迟锁相环(DLL)、数字频率合成器(DFS)以及数字相移器(DPS)三个模块来实现。对这三个模块的原理及设计进行了详细地阐述,并给出了仿真结果,该DCM电路通过了0.13μm工艺流片。测试结果表明,在低频模式下,该DCM能工作在24～230 MHz之间;在高频模式下,该DCM能工作在48～450 MHz之间,其输入及输出抖动容忍度在低频模式下能达到300 ps,在高频模式下能达到150 ps。
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| 关 键 词： | FPGA芯片 数字时钟管理器 延迟锁相环 数字频率合成器 数字相移器 |
Design and Implementation of the Digital Clock Manager in FPGA |
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| Li Wenchang,Li Ping,Yang Zhiming,Li Wei,Wang Luyu.Design and Implementation of the Digital Clock Manager in FPGA[J].Semiconductor Technology,2011,36(11):848-852. |
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| Authors: | Li Wenchang Li Ping Yang Zhiming Li Wei Wang Luyu |
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| Affiliation: | Li Wenchang1,Li Ping1,2,Yang Zhiming2,Li Wei1,Wang Luyu1(1.State Key Laboratory of Electronic Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China;2.Chengdu Sino Microelectronics Technology Co.,Ltd.,Chengdu 610041,China) |
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| Abstract: | Digital clock manager(DCM) is an essential part in FPGA.The main function of the DCM is eliminating clock offset,frequency synthesis and phase shift.And the DCM is composed of three modules,including delay locked loop(DLL),digital frequency synthesis(DFS) and digital phase shift(DPS).The design process and implementation of the DCM were proposed,and the circuit design and simulation were discussed in detail.The design was verified through the successful implementation of the whole desired functionality by the process of 0.13 μm.The DCM can work between 24-230 MHz in low frequency mode,between 48-450 MHz in the high frequency mode.Its largest jitter input and output can be up to 300 ps and 150 ps in low and high frequency mode,respectively. |
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| Keywords: | FPGA chip digital clock manager(DCM) delay locked loop(DLL) digital frequency synthesis(DFS) digital phase shift(DPS) |
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