| 面向BWDSP100的编译基础设施扩展研究 |
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| 引用本文： | 王昊,王向前.面向BWDSP100的编译基础设施扩展研究[J].中国集成电路,2014(7):40-43. |
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| 作者姓名： | 王昊 王向前 |
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| 作者单位： | 中国电子科技集团公司第三十八研究所,安徽合肥230088 |
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| 摘 要： | BWDSP100是一款采用16发射、SIMD、VLIW架构的32位高性能DSP,适用于雷达信号处理、电子对抗、通信及图像处理等领域。对这种体系结构,编译器是发挥其高性能的关键因素。本文针对在Openimpact编译基础设施基础上开发BWDSP100编译器过程中遇到的一些关键技术加以讨论,并对Openimpact对多簇BWDSP100的支持进行了扩展。
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| 关 键 词： | SIMD VLIW 分簇 指令调度 |
Research on Expansion of Compiler Infrastructure for BWDSP100 |
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| WANG Hao,WANG Xiang-qian.Research on Expansion of Compiler Infrastructure for BWDSP100[J].China Integrated Circuit,2014(7):40-43. |
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| Authors: | WANG Hao WANG Xiang-qian |
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| Affiliation: | (No.38th Research Institute, China Electronic Technology Group Corporation, Hefei 230088, China) |
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| Abstract: | BWDSP100 is 32-bit high performance DSP with 16-issue, SIMD and VLIW features. This DSP can be used in radar signal processing, electronic countermeasure, communication and image-processing fields. Compiler plays the key role in carrying out the architecture＇ s high performance. This paper will discuss some key techinologies used in developing BWDSP100 compiler on the base of Openimpact, and expand Openimpact support for cluster BWDSP100. |
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| Keywords: | SIMD VLIW Cluster Instruction Scheduling |
| 本文献已被 CNKI 维普 等数据库收录！ |
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