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一种低功耗高线性度推挽跨导放大器
引用本文:张其营,周泽坤,明鑫,张波.一种低功耗高线性度推挽跨导放大器[J].中国集成电路,2014(5):40-44.
作者姓名:张其营  周泽坤  明鑫  张波
作者单位:电子科技大学电子薄膜与集成器件国家重点实验室,四川成都610054
摘    要:采用华虹NEC 0.35um BCD工艺,设计并实现了一种可作DC-DC转换器控制芯片内部误差放大器的CMOS跨导放大器,该跨导放大器采用源极电阻跨接式负反馈技术提高跨导的线性度、采用双折叠式差分对结构实现共模输入范围轨至轨(rail-to-rail)、采用低功耗偏置推挽(push-pull)输出结构提高输出驱动负载的能力,整体电路具有结构紧凑、功耗低、线性度高等特点。仿真结果表明:在5.25V电源电压下,驱动1pf负载,直流增益可以达到68.2db,功耗708uw,100kHz下跨导的三次谐波失真HD3达到-56db。

关 键 词:低功耗  高线性度  推挽  跨导放大器

A High-linearity Push-Pull Transconductance Amplifier With Low-power Dissipation
ZHANG Qi-Ying,ZHOU Ze-Kun,MING Xin,ZHANG Bo.A High-linearity Push-Pull Transconductance Amplifier With Low-power Dissipation[J].China Integrated Circuit,2014(5):40-44.
Authors:ZHANG Qi-Ying  ZHOU Ze-Kun  MING Xin  ZHANG Bo
Affiliation:(State Key Lab of Electronic Thin Films and Integrated Device, University of Electronic Science & Technology of China, Chengdu 610054, China)
Abstract:Using HUAHONG NEC 0.35um BCD process, design and realize a CMOS OTA ( Operational Transcon- ductance Amplifier )which can be used as error amplifier in DC-DC converter. This OTA uses resistane-crossed source degeneration technique to get high-linearity transconductance; uses double folding differential pairs topology to realize the input voltage Rail-to-Rail; uses Push-Pull topology to get high drive capability. The whole circuit is compact, and it has high linearity and low power consumption. The simulation results show that the DC Gain is 68.2db, the power dissipation is 708uw with lpf load at 5.25V supply. The third harmonic distortion ( HD3 ) remains below -56db at 100kHz frequency.
Keywords:Low-power dissipation  High-linearity  Push-Pull  OTA
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