0.18μm CMOS工艺10Gb/s VCSEL电压驱动器设计 |
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引用本文: | 张玉良,王志功,苗澎,田玲.0.18μm CMOS工艺10Gb/s VCSEL电压驱动器设计[J].中国集成电路,2009,18(9):35-38. |
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作者姓名: | 张玉良 王志功 苗澎 田玲 |
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作者单位: | 东南大学射频集成电路与系统教育部工程研究中心,江苏南京,210096 |
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基金项目: | 国家高技术研究发展计划;40Gb/s甚短距离并行光传输实验系统,高速芯片之间光互连技术与试验平台 |
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摘 要: | 采用SMIC0.18μm1P6M混合信号CMOS工艺设计了10Gb/sVCSEL电压驱动器,可以用于驱动共阴结构的VCSEL。电路采用了RC负反馈技术和C3A(电容耦合电流放大器)结构,仿真结果表明,电路在10Gb/s速率下工作性能良好,最高可工作至12.5Gb/s。电路采用1.8V和3.5V电压供电,直流总功耗为164mw。
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关 键 词: | VCSEL 电压驱动器 RC负反馈 电容耦合电流放大器 |
10-Gb/s VCSEL Voltage Driver in 0.18-μm CMOS Technology |
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Affiliation: | ZHANG Yu-liang, WANG Zhi-gong, MIAO Peng (Institute of RF- & OE-ICs, Southeast University, Nanjing, 210096, China) |
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Abstract: | A 10 Gb/s VCSEL (vertical-cavity surface-emitting laser ) voltage driver is realized using a 0.18μm single-poly six-metal mixed-signal CMOS technology. It can be used to drive common-cathode VCSELs Degenerated RC components and C3A ( capacitively-coupled current amplifier ) architecture are adopted in the circuit design. The simulation results indicate that the circuit works well at 10 Gb/s, with a maximum data rate up to 12.5 Gb/s. The circuit consumes a DC power of 164 mW from 1.8 V and 3.5 V supply voltage . |
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Keywords: | VCSEL |
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