| 应用于高速串行收发器的CDR电路的设计 |
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| 引用本文： | 宋何娟,庞遵林,孙立宏.应用于高速串行收发器的CDR电路的设计[J].中国集成电路,2011,20(6):38-41. |
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| 作者姓名： | 宋何娟 庞遵林 孙立宏 |
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| 作者单位： | 中国电子科技集团公司第三十八研究所,安徽合肥,230031 |
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| 摘 要： | 时钟数据恢复(CDR)电路是高速数据传输系统的重要组成部分.文章介绍了一种半数字二阶时钟数据恢复电路的基本结构、工作原理和设计方法,并进行了仿真和验证,结果表明,电路能够满足系统设计要求.
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| 关 键 词： | 时钟数据恢复 鉴相器 高速串行收发器 |
The Design of CDR Circuit Used in High Speed Serdes |
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| SONG He-juan,PANG Zun-lin,SUN Li-hong.The Design of CDR Circuit Used in High Speed Serdes[J].China Integrated Circuit,2011,20(6):38-41. |
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| Authors: | SONG He-juan PANG Zun-lin SUN Li-hong |
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| Affiliation: | (No.38 Research Institute,CETC,Hefei 230031,China) |
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| Abstract: | Clock Date Recovery（CDR） circuit is an important part of high speed data transmission system.In this paper,the basic structure and working principle of a semi-digital dual loop CDR circuit is introduced.Besides,the method of design is put forward.At last,the simulation is done and the simulation results show that this circuit meets the requirement of the system. |
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| Keywords: | Clock Date Recovery phase detector high speed serdes |
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