| LPCC浮点运算IP核的设计与实现 |
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| 引用本文： | 李倩,侯义斌,黄樟钦,何东之,王晋嘉,赵丽娜,高曦.LPCC浮点运算IP核的设计与实现[J].微电子学与计算机,2008,25(1):85-88,92. |
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| 作者姓名： | 李倩 侯义斌 黄樟钦 何东之 王晋嘉 赵丽娜 高曦 |
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| 作者单位： | 北京工业大学,嵌入式软件与系统研究所,北京,100022 |
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| 基金项目： | 国家自然科学基金项目(90407017)，北京市教委基金项目(KP2701200201) |
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| 摘 要： | 介绍了线性预测倒谱系数(Linear Prediction Cepstrum Coefficient,LPCC)提取算法,给出该算法的一种浮点IP核实现模型,并详细描述了各个子模块的设计方法。以VHDL作为设计语言,在ISE、ModelSim软件下完成综合和仿真,并在Xilinx Spartan-3 FPGA目标板上实现设计。采用关键路径流水线实现、资源共享等技术进行优化。该IP核计算结果精度高,运算时间短,已经成功应用在嵌入式语音识别系统中。
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| 关 键 词： | IP核 线性预测倒谱系数 FPGA 语音识别 |
| 文章编号： | 1000-7180（2008）01-0085-04 |
| 收稿时间： | 2006-12-07 |
| 修稿时间： | 2006年12月7日 |
Design and Implementation of LPCC Floating-Point Extraction IP Core |
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| LI Qian,HOU Yi-bin,HUANG Zhang-qin,HE Dong-zhi,WANG Jin-jia,ZHAO Li-na,GAO Xi.Design and Implementation of LPCC Floating-Point Extraction IP Core[J].Microelectronics & Computer,2008,25(1):85-88,92. |
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| Authors: | LI Qian HOU Yi-bin HUANG Zhang-qin HE Dong-zhi WANG Jin-jia ZHAO Li-na GAO Xi |
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| Abstract: | This paper introduces (Linear Prediction Cepstrum Coefficient,LPCC)extraction algorithm, proposes a floating-point IP core implementation model of this algorithm, and describes the design of each sub-module in detail. The design is described with VHDL; synthesis and simulation is completed by ISE and ModelSim development tools. Finally, it has been implemented in Xilinx Spartan-3 FPGA board. This IP core adopts some optimized methods, such as pipeline structure, resource-sharing structure. It has high precision and short process time. It has been used in embedded speech recognition system successfully. |
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| Keywords: | IP Core LPCC FPGA speech recognition |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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