一种高速、高精度跟踪／保持电路的设计

设计了一种用于14位80MSPS流水线型模数转换器（ADC）的跟踪／保持（T／H）电路。该电路采用全差分结构、互补双极工艺。采用钳位电路提高跟踪／保持电路的线性度，在保持电容之前增加带宽限制电阻来提高跟踪／保持电路的信噪比。在5V单电源供电情况下，基于Zarlink0．6um互补双极工艺模型，对电路进行了仿真。仿真结果显示，在输入信号为39．9609MHz、80MHz采样频率下，无杂散动态范围（SFDR）为92．81dB、功耗32mW。

A High Speed & Resolution Track-and-hold Circuit for Pipelined A/D Converter

This paper describes the design of a track-and-hold(T/H)circuit for a 14-bit 80 MSPS pipeline analog-to-digital converte(rADC).The T/H circuit based on complementary bipolar process makes use of a fully differential architecture.Clamp circuit is used to improve the linearity of the T/H circuit.In order to improve the signal to noise ratio(SNR),the bandwidth-limiting resistor is implemented in the front of hold capacitor.The entire circuit is simulated by Spectre applying 0.6μm complementary bipolar process models at 5 V supply voltage.Simulation results show that it achieves a SFDR of 92.81dB for 39.960 9MHz input signal at 80MHz sampling rate,and the power dissipation is 32mW.