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基于USB总线的中频信号采集系统设计
引用本文:黄硕,赵正予,孙恒青,何作为.基于USB总线的中频信号采集系统设计[J].无线电工程,2010,40(9):38-41.
作者姓名:黄硕  赵正予  孙恒青  何作为
作者单位:武汉大学,电子信息学院,湖北,武汉430079
基金项目:2008年国家自然科学基金项目 
摘    要:通用串行总线(USB)系统具有即插即用、携带方便和传输速度快等优点。针对外设部件互连标准(PCI)总线系统体积较大搬移不便的不足以及异地探测中移动布站的要求,设计了一个以专业高效芯片进行模数转换和数字下变频、以现场可编程门阵列(FPGA)为主时序控制器、以CY7C68013为接口基于USB总线的雷达中频信号采集系统。采用CY7C68013的异步SlaveFIFO模式进行数据传输,在满足了系统小型化、便携化与模块化的要求的同时保证了数据的高速稳定传输。

关 键 词:模数转换  数字下变频  FPGA  CY7C68013  SlaveFIFO

Design of IF Signal Sampling System Based on USB Bus
HUANG Shuo,ZHAO Zheng-yu,SUN Heng-qing,HE Zuo-wei.Design of IF Signal Sampling System Based on USB Bus[J].Radio Engineering of China,2010,40(9):38-41.
Authors:HUANG Shuo  ZHAO Zheng-yu  SUN Heng-qing  HE Zuo-wei
Affiliation:( School of Electronic and Information, Wuhan University, Wuhan Hubei 430079, China )
Abstract:System based on USB bus has the advantage of plug and play, portability and high-speed transmission. To overcome the inflexibility of systems based on PCI bus for their bigger size and to meet the demand of erratic point-assignment in allopatry experiments, a radar IF signal sampling system consisting of specialized and high efficiency ADC/DDC, a FPGA as central time controller and the CY7C68013 as USB bus interface has been designed. Data transmission is made in asynchronous slave FIFO mode through configuring CY7C68013, which ensures the high-speed and stability. The system satisfies the requirements of miniaturization, portability and modularization at the same time.
Keywords:FPGA  CY7C68013  Slave FIFO
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