A Distributed Fair Queueing (DFQ) Architecture for Wireless ATM Local Access Networks |
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Authors: | Richard Kautz Raymond Keh Kee Chaing Chua Alberto Leon-Garcia |
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Affiliation: | (1) University of Toronto, 10 King's College Rd., Toronto, Ontario, M5S 1A4, Canada;(2) Centre for Wireless Communication, (National University Of Singapore), 20 Science Park Road #02-34/37 Tele Tech Park Singapore Science Park II, Singapore, 117674;(3) Centre for Wireless Communication, (National University of Singapore), 20 Science Park Road #02-34/37 Tele Tech Park Singapore Science Park II Singapore, 117674;(4) University of Toronto, 10 King's College Rd., Toronto, Ontario, M5S 1A4, Canada |
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Abstract: | The application of Asynchronous Transfer Mode (ATM) to a Wireless Local Area Network (WLAN) environment is an undertaking that poses many problems not encountered in either wireline ATM or data-only WLAN. Wireline ATM networks do not have to transmit over multiple-access, unreliable transmission media while data-only WLANs do not have to satisfy heterogeneous Quality of Service (QoS) contracts for multimedia services. To address this issue, we propose in this paper a DFQ-based WLAN architecture, designed as a centrally controlled network where a complex base station polls simpler mobile terminals for channel access.DFQ is an implementation of Fair Queueing (FQ) algorithm to schedule the access to the transmission channel among the mobile terminals. The implementation of DFQ introduces new design challenges, mainly in the packet scheduler. A DFQ scheduler is designed to allow fast and efficient processing of scheduling data. The DFQ algorithm is introduced and simulated for delay-sensitive connections, and the hardware implementation of the packet scheduler is discussed.The Centre for Wireless Communications is a national R&D Centre funded by the Singapore National Science and Technology Board |
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Keywords: | Wireless ATM Fair queueing Distributed Fair Queueing Traffic Scheduling WLAN |
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