高速数字电路PCB中串扰问题的研究与仿真

针对高速数字电路PCB中传输线间串扰的严重性,从精确分析PCB中串扰噪声的角度出发,在传统的双线耦合模型的基础上,采用了一种三线串扰耦合模型。该模型由两条攻击线和一条受害线组成,两条攻击线位于受害线的两侧,线间采取平行耦合的方式。利用信号完整性仿真软件Hyperlynx对受害线上的近端串扰噪声和远端串扰噪声进行了仿真。仿真结果表明,不同的传输模式和传输线类型、信号层与地平面的距离、耦合长度、传输线间距和信号上升/下降沿等因素会对受害线上的近端串扰和远端串扰产生较大的影响。在分析仿真结果的基础上,总结出了高速PCB设计中抑制串扰的有效措施,对高速数字电路设计有一定的指导意义。

Crosstalk Simulation of PCB in High Speed Digital Circuit

Aimed at the serious crosstalk noise between the transmission lines in PCB of the high speed digital circuit,a tripling lines model was adopted based on the conventional doubling lines model in order to make a precision analysis of crosstalk.This new model is composed of two aggressor lines and one victim line.The victim line lies in the middle of the aggressor lines,and all the lines are in parallel coupling station.The near-end crosstalk noise and far-end crosstalk noise were simulated by using signal integrity simulation tool-Hyperlynx.The simulation results show that the near-end and far-end crosstalk in victim line are greatly influenced by the following factors:transfer model,the different types of the interconnects,the distance between signal layer and ground layer,coupling length,range interval,signal jump edge and so on.Based on the simulation results,some effective measures for restraining the crosstalk in high speed PCB design were summarized,which can be taken as a reference in design of high speed digital circuit.