| 互连线和CMOS模型对性能影响的分析 |
| |
| 引用本文： | 王子二.互连线和CMOS模型对性能影响的分析[J].信息技术,2009(7):50-52,57. |
| |
| 作者姓名： | 王子二 |
| |
| 作者单位： | 上海交通大学电子信息与电气工程学院微波与射频技术研究中心,上海,200240 |
| |
| 基金项目： | 国家自然科学基金-创新研究群体科学基金 |
| |
| 摘 要： | 在集成电路中,全局互连线的设计是关键.分析了互连线RC和RLC模型的不同特性;针对互连线与CMOS器件级联的电路进行分析.分析了集成电路中互连线和CMOS的模型对性能的影响,并给出了基于HSPICE软件的仿真结果.仿真结果表明,不同互连线和CMOS模型对系统传输特性有一定影响.
|
| 关 键 词： | 高速集成电路 互连线 模型 |
Analysis for interconnect and CMOS models' influence on performance |
| |
| WANG Zi-er.Analysis for interconnect and CMOS models' influence on performance[J].Information Technology,2009(7):50-52,57. |
| |
| Authors: | WANG Zi-er |
| |
| Affiliation: | Center for Microwave and RF Technologies;School of Electronic Information and Electrical Engineering;Shanghai Jiaotong University;Shanghai 200240;China |
| |
| Abstract: | In IC design the feature size continues to shrink,analysis of global interconnects is critical in design.This paper focuses on interconnect and CMOS models' effects on performance in high-speed IC.The differences between interconnects RC model and RLC model are analyzed.For circuits of CMOS inverter driven interconnects simulation is performed using HSPICE software.The simulation results show that the models of interconnect and CMOS have influences on transmission property of system. |
| |
| Keywords: | CMOS high-speed integrated circuits interconnect CMOS model |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
