| C波段小型化低相噪全相参频率综合器 |
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| 引用本文： | 陈昌明,彭烨. C波段小型化低相噪全相参频率综合器[J]. 固体电子学研究与进展, 2013, 33(2): 144-147 |
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| 作者姓名： | 陈昌明 彭烨 |
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| 作者单位： | 成都信息工程学院通信工程学院,成都,610225 |
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| 摘 要： | 提出了一种小型低相噪、低杂散的C波段全相参频率综合器设计方案。基带信号由DDS芯片产生,通过对环路滤波器和电路印制板的优化设计改善相噪和杂散性能,并与PLL输出的C波段点频信号进行上变频,得到所需信号。介绍了实现原理、相位噪声模型及设计方法。测试结果表明,在7.8GHz处,频综相位噪声≤-103dBc/Hz@100kHz,杂波抑制≤-61dBc。
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| 关 键 词： | 频率综合器 相位噪声 直接数字合成 锁相环 |
A Miniature C-band Low Phase Noise and Full-coherent Frequency Synthesizer |
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| CHEN Changming , PENG Ye. A Miniature C-band Low Phase Noise and Full-coherent Frequency Synthesizer[J]. Research & Progress of Solid State Electronics, 2013, 33(2): 144-147 |
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| Authors: | CHEN Changming PENG Ye |
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| Affiliation: | (College of Communication Engineering,Chengdu University of Information Technology,Chengdu,610225,CHN) |
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| Abstract: | A miniature C-band low phase noise and low spurs frequency synthesizer for full-coherent radar is proposed in this paper.The DDS(Direct digital synthesis) chip produces the base-band signal and by optimizing the PCB(Printed circuit board) and active loop filter the performances of phase noise and spurs are improved.Then this signal will be mixed with C-band single frequency to gain the required frequency.The basic principles,models of phase noise and design methods are also presented.The measured results show that the phase noise level is better than-103 dBc/Hz @100 kHz,and the spurious output is below-61 dBc at 7.8 GHz. |
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| Keywords: | frequency synthesizer phase noise direct digital synthesis(DDS) phase-locked leep(PLL) |
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