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一种低噪声高线性度射频前端电路设计
引用本文:许永生,游淑珍,俞惠,李小进,石春琦,赖宗声.一种低噪声高线性度射频前端电路设计[J].固体电子学研究与进展,2006,26(2):188-193.
作者姓名:许永生  游淑珍  俞惠  李小进  石春琦  赖宗声
作者单位:华东师范大学微电子电路与系统研究所,上海,200062
摘    要:介绍了超高频接收系统射频前端电路的芯片设计。从噪声匹配、线性度、阻抗匹配以及增益等方面详细讨论了集成低噪声放大器和下变频混频器的设计。电路采用硅基0.8μm B iCM O S工艺实现,经过测试,射频前端的增益约为18 dB,双边带噪声系数2.5 dB,IIP 3为+5 dBm,5 V工作电压下的消耗电流仅为3.4 mA。

关 键 词:超高频接收芯片  射频集成电路  射频前端  低噪声放大器  混频器
文章编号:1000-3819(2006)02-188-06
收稿时间:2005-07-11
修稿时间:2005-09-02

A Low Noise High Linearity RF Front End Circuits Design
XU Yongsheng,YOU Shuzhen,YU Hui,LI Xiaojin,SHI Chunqi,LAI Zongsheng.A Low Noise High Linearity RF Front End Circuits Design[J].Research & Progress of Solid State Electronics,2006,26(2):188-193.
Authors:XU Yongsheng  YOU Shuzhen  YU Hui  LI Xiaojin  SHI Chunqi  LAI Zongsheng
Abstract:One key design of UHF receiver IC,i.e.RF front end circuit,is described.From the aspects of noise matching,linearity,impedance matching and gain,the design methodology of the integrated low noise amplifier and downconversion mixer are presented in detail.The circuits have been fabricated with a 0.8 μm silicon BiCMOS process.The overall conversion gain of the front end is 18 dB,the double-sideband noise figure is 2.5 dB,the IIP3 is +5 dBm,and the circuit takes only 3.4 mA from a 5 V supply.
Keywords:UHF receiver IC  RFIC  RF front end  low noise amplifier  mixer
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