±0.9 V switched-capacitor CMOS multiplier with rail-to-railinput |
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Authors: | Grech I Micallef J Vladimirova T |
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Affiliation: | Dept. of Microelectron., Malta Univ., Msida; |
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Abstract: | An analogue, fully differential, switched capacitor CMOS multiplier with rail-to-rail input capability is presented, together with simulation results. The multiplier can operate at a clock frequency of 10 MHz when operated from a ±0.9 V power supply. Special attention has been given to the minimisation of clock feedthrough errors and also to achieve a low common mode voltage error at the output. The latter makes the device suitable for use in correlators with large integration periods |
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