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高速PCB板的信号完整性设计
引用本文:周萍.高速PCB板的信号完整性设计[J].电子质量,2009(1):32-36.
作者姓名:周萍
作者单位:西安电子科技大学机电工程学院,陕西,西安,710071
摘    要:随着集成电路开关速度的提高以及PCB板密度的增加,信号完整性问题已成为高速PCB设计必须关注的问题之一。如何在高速PCB设计过程中充分考虑信号完整性因素,并采取有效的控制措施,已经成为当今系统设计能否成功的关键。此文在充分考虑SI的基础上,利用Cadence的Allegro完成了基于DSP和FPGA的某信号处理机的硬件设计,并使用Mentor公司的Hyperlynx进行仿真分析优化PCB设计,避免了信号完整性的潜在影响。

关 键 词:高速PCB  信号完整性  EMC

Signal Integrity Designs of High-Speed PCB
Zhou Ping.Signal Integrity Designs of High-Speed PCB[J].Electronics Quality,2009(1):32-36.
Authors:Zhou Ping
Affiliation:School of Mechano-Electronic Engineering of Xidian University;Shanxi Xi'an 710071
Abstract:With the increase of integrated circuit switch rate and PCB density, signal integrity has become one of the problems must be concerned in high-speed PCB design. How to fully consider SI and take effective measures has been a key factor of a system design. Based on the consideration of SI, I finished a PCB design of a signal processor with the help of Allegro tools, and used the simulator of Hyperlynx to optimize the PCB design, successful escaped the influence of SI.
Keywords:EMC
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