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基于FPGA的光纤通道协议引擎的设计与实现
引用本文:赵备,余锋,胡璇,舒宇,汪乐宇.基于FPGA的光纤通道协议引擎的设计与实现[J].浙江大学学报(自然科学版 ),2009,43(9):1604-1608.
作者姓名:赵备  余锋  胡璇  舒宇  汪乐宇
作者单位:(浙江大学 仪器科学与工程学系 ,浙江 杭州 310027)
摘    要:为加速光纤通道(FC)技术在航空电子系统中的应用,在深入分析光纤通道协议的基础上,基于现场可编程门阵列(FPGA)平台,提出一种高性能光纤通道协议引擎的设计与实现方法.对FC 2层协议的实现进行以序列为中间交互层的软硬件划分,给出了支持多平台应用的系统构架,设计了兼容各种速率且具有可重用性的硬件核心模块,并在具体FPGA平台上实现了2125 Gb/s的光纤通道协议.测试结果证实,该协议引擎不仅功能正确,而且具有高性能,2 112 bytes的数据块传输的时间延迟在16 μs以下,单向有效数据带宽在1600 Gb/s以上,适合航空电子系统关键任务的应用.

关 键 词:光纤通道  现场可编程门阵列  软硬件划分  协议引擎  拆组包

Design and implementation of fibre channel protocol engine based on FPGA
DIAO Bei,TU Feng,HU Xuan,SHU Yu,WANG Le-yu.Design and implementation of fibre channel protocol engine based on FPGA[J].Journal of Zhejiang University(Engineering Science),2009,43(9):1604-1608.
Authors:DIAO Bei  TU Feng  HU Xuan  SHU Yu  WANG Le-yu
Affiliation:(Department of Instrumentation Science and Engineering, Zhejiang University, Hangzhou 310027, China)
Abstract:A fibre channel (FC) protocol processing engine based on field programmable gate array (FPGA) was proposed by analyzing the protocol in order to accelerate the applications of FC technology in the avionics. A novel hardware and software partition using sequence as the transaction interface layer was designed to support flexible system architecture for multiple platforms. The 2125 Gb/s FC protocol engine was successfully implemented on FPGA using a speed adaptive and reusable hardware core. Test results confirmed that the FC engine had high performance. The latency of transferring 2112 bytes data was less than 16 μs, and the unidirectional payload bandwidth was greater than 1600 Gb/s. The FC engine is suitable for mission critical avionic applications.
Keywords:fibre channel (FC)  field programmable gate array (FPGA)  software and hardware partition  protocol engine  segmentation and reassembly (SAR)
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