| 一种PCI总线接口的设计 |
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| 引用本文： | 金鹏飞,毛永毅,张宏君.一种PCI总线接口的设计[J].西安邮电学院学报,2012,17(5):65-69. |
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| 作者姓名： | 金鹏飞 毛永毅 张宏君 |
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| 作者单位： | 1. 西安邮电学院电子工程学院,陕西西安,710121
2. 西安邮电学院通信与信息工程学院,陕西西安,710121 |
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| 基金项目： | 陕西省自然科学基金资助项目(2009JM8015);陕西省教育厅专项科研基金资助项目(2010JK815) |
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| 摘 要： | 对外设部件互连标准(Peripheral Component Interconnect,PCI)总线接口进行分析和研究,提出一种PCI总线接口的设计方案。利用模块化的设计方法设计PCI总线接口,并介绍主/从接口状态机模块和工作过程。用Modesim软件对PCI接口的硬件设计进行功能仿真。仿真结果表明,该设计能够满足PCI总线的时序要求。
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| 关 键 词： | 外设部件互连标准总线接口 现场可编程门阵列 超高速集成电路硬件描述语言 |
Design of PCI bus interface |
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| JIN Pengfei,MAO Yongyi,ZHANG Hongjun.Design of PCI bus interface[J].Journal of Xi'an Institute of Posts and Telecommunications,2012,17(5):65-69. |
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| Authors: | JIN Pengfei MAO Yongyi ZHANG Hongjun |
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| Affiliation: | 1.School of Electronic Engineering,Xi’an University of Posts and Telecommunications,Xi’an 710121,China; 2.School of Communication and Information Engineering,Xi’an University of Posts and Telecommunications,Xi’an 710121,China) |
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| Abstract: | After analysis and research about PCI bus interface,a design of PCI bus interfaces is proposed.The PCI bus interface is designed by using modular design method,master and slave interfaces’ state machine and working process of PCI bus interface is mainly introduced.Modelsim software is used doing function simulation for the hardware design of PCI interface.The simulation result shows that the interface fulfils the timing requirements of the PCI bus. |
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| Keywords: | PCI bus interface FPGA VHDL |
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