| Census立体匹配算法的硬件实现 |
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| 引用本文： | 孙明敏,楼斌,周文晖.Census立体匹配算法的硬件实现[J].杭州电子科技大学学报,2013(1):52-55. |
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| 作者姓名： | 孙明敏 楼斌 周文晖 |
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| 作者单位： | 杭州电子科技大学计算机应用技术研究所,浙江杭州310018 |
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| 摘 要： | 立体匹配是立体视觉技术的核心算法，但计算量大，实时性差，现有的基于FPGA的实现方法虽然可实时实现，但芯片选型通常是高性能FPGA芯片。该文针对Altera高性价比CycloneII系列FPGA芯片提出一种Census立体匹配算法的硬件实现结构，可实现640×480立体图像的实时匹配。与现有方法相比，资源占用低，匹配速度快，适用于低成本应用。
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| 关 键 词： | 实时立体匹配 低成本应用 现场可编程门阵列 |
FPGA-based Census Stereo Matching Algorithm |
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| SUN Ming-min,LOU Bin,ZHOU Wen-hui.FPGA-based Census Stereo Matching Algorithm[J].Journal of Hangzhou Dianzi University,2013(1):52-55. |
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| Authors: | SUN Ming-min LOU Bin ZHOU Wen-hui |
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| Affiliation: | (School of Computer, Hangzhou Dianzi University, Hangzhou Zhejiang 310018, China) |
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| Abstract: | Stereo matching is the core algorithm of stereo vision technology, with computationally intensive, poor real-time. Existing FPGA-based real-time implementations use expensive chip. This paper presents a hardware architecture of Census stereo matching algorithm, which implemented with Altera FPGA chip Cyclone II. It can realize 640480 images＇ real-time matching. Compared with existing FPGA-based methods, it has low resource consumption, while matching with high speed. It is suitable for low-cost applications system. |
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| Keywords: | real-time stereo matching low-cost applications field programmable gate array |
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