寄生电感对于功率MOSFET开关特性的影响

分散在MOSFET栅极、源极、漏极的寄生电感由于封装以及印制电路板（PCB）走线，改变了MOSFET的开关特性。通过仿真分析对比，指出MOSFET寄生电感存在如下特性：源极电感对栅极驱动形成负反馈，导致开关速度变慢，采用开尔文连接，可以将栅极回路与功率回路解耦，提高驱动速度；在米勒效应发生时刻需要合理地降低栅极电感来降低栅极驱动电流；漏极电感通过米勒电容影响MOSFET的开通速度，在关断时刻导致电压应力增加；在并联的回路当中，非对称的布局将导致MOSFET之间的动态不均流；当MOSFET在开关过程中，环路电感与MOSFET自身的结电容产生振荡时，可以在电路增加吸收电容减小环路电感，改变振荡特性。

Influence of Parasitic Inductance on Switching Characteristics of Power MOSFET

The parasitic inductance scattered across the gate, source, and drain of the metal-oxide-semiconductor field-effect transistor (MOSFET) changes the switching characteristics of the MOSFET due to the packaging and printed circuit board (PCB) wiring. Through simulation analysis and comparison, it is pointed out that MOSFET parasitic inductance has the following characteristics. The source inductance forms a negative feedback on the gate drive, resulting in a slow switching speed. The Kelvin connection can decouple the gate loop and the power loop and quicken the driving speed. When the Miller effect occurs, the gate inductance should be reasonably reduced to reduce the driving current of the gate. The drain inductance influences the switching speed of MOSFET through Miller capacitance, resulting in an increase in voltage stress at the turn-off moment. In the parallel circuit, the asymmetrical layout will lead to the dynamic uneven current between MOSFETs. When the loop inductance oscillates with the junction capacitance of MOSFET in the switching process, the loop inductance can be reduced by adding the absorption capacitance in the circuit, and the oscillation characteristics can be changed.