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基于FPGA的多通道数据采集系统的设计
引用本文:史籍,常越,李海国.基于FPGA的多通道数据采集系统的设计[J].电气自动化,2016(1):15-18.
作者姓名:史籍  常越  李海国
作者单位:上海交通大学电子信息与电气工程学院,上海,200000
摘    要:介绍了一种基于Mach XO2 4000ZE系列的FPGA芯片和模数转换芯片AD7356的多通道数据采集系统,采样率最高可达到5Msps。系统采用多个AD芯片来实现多路模拟量的实时采集。通过verilog编程语言实现FPGA芯片对AD转换的时序控制。FPGA内嵌的双口RAM作为数据缓存器来存储转换结果。通过FPGA控制单元对AD转换部分和数据缓存部分的控制可实现数据采集与数据输出的同时执行。阐述了系统的构成以及各个部分的工作原理,着重分析了FPGA控制策略和数据缓存的实现,并使用Modelsim仿真软件进行仿真与分析。

关 键 词:FPGA  AD7356  多路采集  A/D转换  数据缓存
修稿时间:2015/11/19 0:00:00

Design of the FPGA-based Multichannel Data Acquisition System
SHI Ji,CHANG Yue and LI Hai-guo.Design of the FPGA-based Multichannel Data Acquisition System[J].Electrical Automation,2016(1):15-18.
Authors:SHI Ji  CHANG Yue and LI Hai-guo
Affiliation:School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai 200000, China,School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai 200000, China and School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai 200000, China
Abstract:This paper presents a multichannel data acquisition system based on MachXO2 4000ZE series FPGA chip and A/D conversion chip AD7356, with a sampling rate up to 5Msps. The system adopts several AD chips to achieve real-time acquisition of multichannel analog quantity. Verilog programming language is used to realize FPGA chip''s timing control over A/D conversion. FPGA- embedded dual-port RAMs are used as data caches to store conversion results. Data acquisition and data output are performed simultaneously through FPGA control unit''s control over A/D conversion section and data caching section. Furthermore, this paper describes the structure of the system and the principle of each part, analyzes the FPGA control strategy and realization of data caching, and uses Modelsim simulation software for simulation and analysis purpose.
Keywords:FPGA  AD7356  multichannel acquisition  A/D conversion  data caching
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