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一种基于FPGA&DSP合并单元的实现方案
引用本文:谢经东,李红斌,刘曲波,燕沙.一种基于FPGA&DSP合并单元的实现方案[J].电气应用,2007,26(6):43-46.
作者姓名:谢经东  李红斌  刘曲波  燕沙
作者单位:华中科技大学电气与电子工程学院 430074
摘    要:合并单元是数字输出式电子式电流、电压互感器与二次保护、控制设备接口的必要环节。本文简要介绍了合并单元的基本功能,并给出了一种基于现场可编程门阵列(FPGA)和数字信号处理(DSP)技术的合并单元实现方案。该方案将合并单元分成4个功能模块,对每个模块功能及实现方法进行了详细阐述和具体分析。试验结果表明合并单元工作良好,该方案有较高的可靠性和较强的实用性。

关 键 词:合并单元  现场可编程门阵列  数字信号处理  网络模块
修稿时间:2006年8月16日

Realization of Merging Unit Based on FPGA&DSP
Xie Jingdong.Realization of Merging Unit Based on FPGA&DSP[J].Electrotechnical Application,2007,26(6):43-46.
Authors:Xie Jingdong
Affiliation:Huazhong University of Science and Technology
Abstract:Merging unit is an essential interface between electronic current or voltage transformers with digital output and the secondary devices for measurement and protection. The basic functions of merging unit are briefly introduced and a realization scheme of merging unit based on FPGA and DSP is proposed. In this scheme merging unit is divided into 4 functional modules whose function and realization method are detailedly presented and concretely analyzed. Experimental results show that merging unit operates well and the realization method has higher reliability and practicability.
Keywords:merging unit FPGA DSP network module
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