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级联两电平换流器CTLC的建模和快速仿真方法
引用本文:许建中,赵成勇,姬煜轲,熊岩.级联两电平换流器CTLC的建模和快速仿真方法[J].电源学报,2015,13(6):101-109.
作者姓名:许建中  赵成勇  姬煜轲  熊岩
作者单位:新能源电力系统国家重点实验室(华北电力大学),新能源电力系统国家重点实验室(华北电力大学),新能源电力系统国家重点实验室(华北电力大学),新能源电力系统国家重点实验室(华北电力大学)
基金项目:国家863高技术基金项目(2013AA050105)
摘    要:级联两电平换流器CTLC(cascaded two level converter)是由ABB公司提出的一种类似于模块化多电平换流器MMC(modular multilevel converter)的拓扑,它继承了MMC的优良特性,同时大幅降低了控制器复杂度,节约了投资。然而,尚未见文献报道CTLC的建模和快速仿真方法及其换流器内部故障仿真方法。首先介绍了CTLC的拓扑、基本原理及适合于CTLC的载波移相调制均压策略;其次重点针对CTLC中的谐振滤波器展开研究,对比分析了不同参数下滤波性能的差异。进而基于戴维南等效原理,搭建了包含CTLC拓扑及调制均压策略的整体电磁暂态快速仿真模型。最后,提出了一种CTLC阀内故障的仿真方法,可以精确仿真开关器件的短路和断路故障。在PSCAD/EMTDC中搭建的双端49电平CTLC-HVDC仿真模型,验证了所提出建模及故障仿真方法的有效性。

关 键 词:级联两电平换流器(CTLC)  载波移相  谐振滤波器  高效建模  阀内故障
收稿时间:2015/7/26 0:00:00
修稿时间:2015/10/29 0:00:00

Research on Modelling and Fast Simulation of Cascaded Two-level Converter
XU Jianzhong,ZHAO Chengyong,JI Yuke and XIONG Yan.Research on Modelling and Fast Simulation of Cascaded Two-level Converter[J].Journal of power supply,2015,13(6):101-109.
Authors:XU Jianzhong  ZHAO Chengyong  JI Yuke and XIONG Yan
Affiliation:State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources (North China Electric Power University),North China Electric Power University (Beijing),,
Abstract:The cascaded two level converter(CTLC), a kind of converter topology similar to modular multilevel converter(MMC), is designed by ABB. Not only inherited the excellent characteristics of MMC, CTLC also simplified the complexity of controllers. As a result, the investment can be saved. However, the modeling approach of CTLC and the internal fault simulation of CTLC have not been mentioned. Firstly, this paper made a brief introduction on the structure of CTLC, basic mechanism and carrier phase shifted based PWM modulation. Secondly, one important aim of this paper is to investigate the resonant filter, and the relationship between filter parameter configuration and inhibitory effect was theoretically analyzed. Thirdly, the integral electromagnetic transient efficient model of the CTLC was set up using the previously developed Thévenin's equivalent algorithms. Fourthly, the CTLC internal fault simulation method was proposed, based on which, the short circuit and open circuit faults of switching devices can be simulated precisely. Finally, a 49-level CTLC-HVDC system on PSCAD/EMTDC validats all the proposed schemes.
Keywords:CTLC  carrier phase shifted  resonant filter  efficient modeling  internal valve failure
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