基于改进量子进化算法的3D NoC测试TSV优化

针对硅通孔(through-silicon-via,TSV)的生产成本高,占用面积大等问题,首先对三维片上网络(3D NoC)进行测试规划研究,将测试规划得到的最短测试时间作为约束条件,采用改进的量子进化算法优化测试占用的TSV数量,将各层的TSV按照需求进行配置,并将TSV合理有效地分配给各个内核,以在有限的TSV数量下,降低硬件开销,提高利用率,同时,探讨TSV的分配对测试时间的影响。算法中,引入量子旋转门旋转角动态调整策略和量子变异策略,以提高算法的全局寻优能力和收敛速度,避免陷入局部最优解。将ITC’02基准电路作为仿真实验对象,由实验结果可得,本算法能够快速地收敛到最佳解,有效的减小了测试时间,优化了TSV数量,提高了TSV的利用率。

3D NoC test TSV optimization based on improved quantum inspired evolutionary algorithm

Aiming atthe high production cost and the large occupied area of through-silicon-vias(TSVs)in three-dimensional network-on-chip,the test scheduling of 3D NoC is researched.To reduce the hardware overhead and improve the utilization rate in a limited number of TSVs,a new methodusing improved quantum-inspired evolutionaryalgorithmis proposed,which is to configure TSVs in each layer according to the demandand allocate TSVs to each core reasonably and effectively.Moreover,the impact of TSVs' allocation on testtime under the constraint of the shortest test time is discussed.To improve the ability of searching and converge speed,the strategy of dynamic adjustment of rotating angle of quantum rotating gate and quantum mutation are designed in the algorithm,which can prevent the algorithm from running into the local optimization solution effectively.Taking ITC'02 standard circuit as the test object,experiment is conducted,and the experiment results demonstrate that the proposed method can converge to the optimal solution quickly to reduce the total test time,and the number of TSVs can be optimized to improve the TSVs' utilization.