| 基于嵌入式系统的简易逻辑分析仪设计 |
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| 引用本文： | 许可行,吴帅,周晓华.基于嵌入式系统的简易逻辑分析仪设计[J].国外电子测量技术,2017,36(7):77-81. |
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| 作者姓名： | 许可行 吴帅 周晓华 |
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| 作者单位： | 火箭军指挥学院 武汉 430012,火箭军指挥学院 武汉 430012,火箭军指挥学院 武汉 430012 |
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| 摘 要： | 基于数字信号采集处理以及数字示波器存储显示原理，提出了一种简易逻辑分析仪制作方案。该系统主要由C8051F020与FPGA最小系统模块、ADC采集模块、信号衰减模块及TFT触摸显示模块组成。该设计采用单级、三级触发方式判断，可同时对8路信号进行采集、触发、存储及显示。经实验验证，该系统具有较高的测试速率、能实现多通道输入、可进行多级触发等优点。
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| 关 键 词： | 数字信号 逻辑分析仪 触发 多通道 |
Design of simple logic analyzer based on embedded system |
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| Xu Kexing,Wu Shuai and Zhou Xiaohua.Design of simple logic analyzer based on embedded system[J].Foreign Electronic Measurement Technology,2017,36(7):77-81. |
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| Authors: | Xu Kexing Wu Shuai and Zhou Xiaohua |
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| Affiliation: | Rocket Force Command College, Wuhan 430012, China,Rocket Force Command College, Wuhan 430012, China and Rocket Force Command College, Wuhan 430012, China |
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| Abstract: | This paper presents a solution scheme to realize the simple logical analyzer based on digital signals processing and digital storage oscilloscope principle. The system is mainly composed of minimum system of C8051F020 and FPGA, ADC converting module, signal attenuation module and TFT Touch Screen. The design uses single stage and third stage trigger. Meanwhile, the system can collect 8 channels of analog signals, trigger and storage. The experiment indicates that system has the advantages ofhigh speed test, multichannel input, multi mode triggers. |
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| Keywords: | digital signal logic analyzer attenuation triggering |
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