| 基于FPGA的A/D转换采集控制模块设计 |
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| 引用本文： | 黄容兰,万德焕.基于FPGA的A/D转换采集控制模块设计[J].数据采集与处理,2009,24(Z1). |
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| 作者姓名： | 黄容兰 万德焕 |
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| 作者单位： | 黄容兰(桂林电子科技大学电子工程学院,桂林,541004);万德焕(桂林空军学院四系,桂林,541003) |
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| 摘 要： | 采用FPGA器件EP1C3T144C8N处理器,对A/D转换芯片AD7714进行采样控制.整个设计在Quartus I平台下进行软件编程,采用Verilog语言描述,实现正确的AD7714转换的工作时序控制过程,并将采样的数据存储起来进行处理.本设计可用于微弱信号采集和实时监控方面,仿真结果显示该模块工作性能稳定、可靠性高、使用方便.
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| 关 键 词： | 采样控制 A/D转换 |
Design of A/D Convertion Sampling Control Module Based on FPGA |
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| Abstract: | The FPGA device EP1C3T144C8N is used to control the A/D converter AD7714 in this paper.The whole design is based on the Quartus Ⅱ platform.The process is described by the Verilog language to realize the correct sequence controlling process of AD7714 converter and storage the sampling data to processe.It can be widely used in the feebleness data sampling and the real-time supervisory control.Simulation result shows that the module has the advantages of stable performance,high reliability and convenient usage. |
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| Keywords: | FPGA Verilog sampling control FPGA Verilog A/D convertion |
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