| 考虑逻辑门延时的冗余固定故障检测方法 |
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| 引用本文： | 蔡烁,文翔,童伟,欧阳翅.考虑逻辑门延时的冗余固定故障检测方法[J].计算机工程与应用,2012,48(17):68-71. |
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| 作者姓名： | 蔡烁 文翔 童伟 欧阳翅 |
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| 作者单位： | 1. 长沙理工大学计算机与通信工程学院,长沙410004;湖南大学信息科学与工程学院,长沙410082
2. 长沙理工大学计算机与通信工程学院,长沙,410004 |
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| 基金项目： | 国家自然科学基金，湖南省大学生创新实验基金 |
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| 摘 要： | 提出利用瞬态电流测试(IDDT Testing)方法检测数字电路中的冗余固定故障。检测时采用双向量模式,充分考虑逻辑门的延时特性。针对两类不同的冗余固定故障,分别给出了激活故障的算法,在此基础上再对故障效应进行传播。SPICE模拟实验结果表明,该方法能有效地区分正常电路与存在冗余故障的电路,可以作为电压测试方法的一种有益的补充。
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| 关 键 词： | 冗余固定故障 瞬态电流 时延 跳变 |
Method to test redundant stuck-at faults considering logic gates' delay |
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| CAI Shuo
,
WEN Xiang
,
TONG Wei
,
OUYANG Chi.Method to test redundant stuck-at faults considering logic gates' delay[J].Computer Engineering and Applications,2012,48(17):68-71. |
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| Authors: | CAI Shuo WEN Xiang TONG Wei OUYANG Chi |
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| Affiliation: | 1.School of Computer and Communication Engineering,Changsha University of Science and Technology,Changsha 410004,China 2.School of Information Science and Engineering,Hunan University,Changsha 410082,China |
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| Abstract: | This paper proposes a method to test redundant stuck-at faults of digital circuits by I DDT testing.The scheme uses two patterns and considers the path delay of logic gates.In order to test two kinds of redundant stuck-at faults,the algorithms which can activate and transmit the faults are presented.SPICE simulation experimental results show the proposed method can distinguish the fault circuits and the fault free circuits effectively,and it can be used as a beneficial supplement of voltage test method. |
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| Keywords: | redundant stuck-at faults transient current delay transition |
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