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2Gsps高速数据采集系统的设计与实现
引用本文:王辰,王厚军,石强.2Gsps高速数据采集系统的设计与实现[J].自动化信息,2007(1):57-58,38.
作者姓名:王辰  王厚军  石强
作者单位:电子科技大学自动化工程学院,成都610054
摘    要:本文介绍了一种基于交替采样技术的高速数据采集系统,该系统采用了两片采样率为1GSPS的A/D实现了2GSPS的采样率,并利用FPGA对A/D输出数据的进行转换和缓存。本文着重介绍了该数据采集系统设计和高速存储所涉及到的问题,并给出了仿真波形。

关 键 词:交替采样  高速A/D  高速PCB制版  FPGA
文章编号:1817-0633(2007)01-0057-02

Design and Implementation of 2Gsps High-speed Data Acquisition System
WANG Chen, WANG Hou-jun, SHI Qiang.Design and Implementation of 2Gsps High-speed Data Acquisition System[J].Automation Information,2007(1):57-58,38.
Authors:WANG Chen  WANG Hou-jun  SHI Qiang
Abstract:This paper introduces a kind of high-speed data acquisition system based on time-interleaved technique. This system achieves high sampling rate up to 2Gsps by using two A/D converters with comparatively low sampling rate-lGsps. The conversion and the storage of the output of A/D converter are implemented in FPGA. This paper focuses on the data acquisition system design and high-speed data storage with the functional simulation waveform provided.
Keywords:Time-interleaved Sampling  High-speed A/D  High-speed PCB Layout  FPGA
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