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ARMv4指令集模拟器设计及优化技术
引用本文:严迎建,刘明业.ARMv4指令集模拟器设计及优化技术[J].小型微型计算机系统,2005,26(2):315-317.
作者姓名:严迎建  刘明业
作者单位:1. 北京理工大学ASIC研究所,北京,100081;解放军信息工程大学,电子技术学院,河南,郑州,100081
2. 北京理工大学ASIC研究所,北京,100081
基金项目:国防基础科研项目 (J14 0 0 B0 0 6)资助 .
摘    要:指令集模拟器是处理器、编译器以及嵌入式系统设计中的重要工具之一.首先讨论指令集模拟器的分类及特点,然后阐述作者采用解释技术开发的ARMv4指令集模拟器的实现方法,为了提高模拟效率,还讨论几种性能优化技术.

关 键 词:指令集模拟器  解释型模拟  编译型模拟  嵌入式系统
文章编号:1000-1220(2005)02-0315-03

Design and Optimization of ARMv4 Instruction Set Simulator
Yan Ying-jian,LIU Ming-ye.Design and Optimization of ARMv4 Instruction Set Simulator[J].Mini-micro Systems,2005,26(2):315-317.
Authors:Yan Ying-jian  LIU Ming-ye
Affiliation:YAN Ying jian 1,2,LIU Ming ye 1 1
Abstract:Instruction Set Simulator is one important tools in design of processor, compiler and embedded system. In this paper, classification and characteristic of the instruction set simulator was introduced, then an instruction set simulator for the ARM processor of architecture version 4 developed by author was presented, the design and implementation were discussed in detailed. And to improve the performance, some optimization methods are introduced.
Keywords:instruction set simulator  interpretative simulation  compiled simulation  embedded system  
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