| 系统级体系结构仿真器的研究与实现 |
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| 引用本文： | 陆岚,王克祥,熊悦,赵振西.系统级体系结构仿真器的研究与实现[J].小型微型计算机系统,2001,22(10):1166-1169. |
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| 作者姓名： | 陆岚 王克祥 熊悦 赵振西 |
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| 作者单位： | 中国科学技术大学计算机科学技术系 |
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| 摘 要： | 系统级体系结构仿真器是可以作为一个虚拟目标机器运行的软件系统，它可以实现对单（多）处理器、内存系统、Cache和外部设备等于系统的功能模拟。在体系结构设计和操作系统开发等工程，体系结构仿真器有着广泛的应用。本文介绍了一个基于MISC CPU和SPARC体系结构的系统级仿真器FMCS。
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| 关 键 词： | 仿真器 系统级体系结构 指令集 |
| 文章编号： | 1000-1220(2001)10-1166-04 |
RESEARCH AND IMPLEMENTATION OF SYSTEM LEVEL ARCHITECTURAL SIMULATOR |
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| LU,Lan,WANG,Ke,xiang,XIONG,Yue,ZHAO,Zhen,xi.RESEARCH AND IMPLEMENTATION OF SYSTEM LEVEL ARCHITECTURAL SIMULATOR[J].Mini-micro Systems,2001,22(10):1166-1169. |
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| Authors: | LU Lan WANG Ke xiang XIONG Yue ZHAO Zhen xi |
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| Abstract: | A system level simulator is a software system that works as a virtual target machine by simulating the function of uniprocessor/multiprocessor,memory system,cache,devices,etc,which is playing an increasingly important role in the design of architecture and the development of operating system.A MISC CPU and SPARC architecture based system level simulator named FMCS is introduced in this article. |
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| Keywords: | System level simulator Architecture Instruction set |
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