| 一种基于DSP和FPGA的博弈硬件方案实现 |
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| 引用本文： | 杜玉远,任涛,徐心和.一种基于DSP和FPGA的博弈硬件方案实现[J].小型微型计算机系统,2006,27(6):970-974. |
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| 作者姓名： | 杜玉远 任涛 徐心和 |
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| 作者单位： | 东北大学,电子科学技术研究所,教育部暨辽宁省流程工业自动化重点实验室,辽宁,沈阳,110004 |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 为了提高博弈系统处理速度，设计一套专用的多处理器系统，达到博弈处理能力要求是一种切实可行的方案．而多处理器系统的并行计算和任务分配调度也为这套博弈硬件系统提出了难题．在介绍国际象棋博弈计算机发展历程及其典型系统的结构基础上，给出了采用松散耦合型的多处理器博弈硬件体系结构．并且详细介绍了基于DSP和FPGA的一种解决方案．根据博弈硬件系统结构和博弈任务的特点，给出了一种有效的任务调度方案．
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| 关 键 词： | 博弈硬件系统 多处理器系统 任务调度算法 数字信号处理器 |
| 文章编号： | 1000-1220（2006）06-0970-05 |
| 收稿时间： | 08 17 2005 12:00AM |
| 修稿时间： | 2005-08-17 |
Scheme of Game Hardware on DSP and FPGA |
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| DU Yu-yuan,REN Tao,XU Xin-he.Scheme of Game Hardware on DSP and FPGA[J].Mini-micro Systems,2006,27(6):970-974. |
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| Authors: | DU Yu-yuan REN Tao XU Xin-he |
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| Affiliation: | Research Institute of Electronics Science and Technology, Key Laboratory of Process Industry Automation, Ministry of Education, Northeastern University, Shenyang 110004, China |
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| Abstract: | In order to improve the process speed of China Chess game system, it is a feasible scheme to design a special multiprocessor system, which can reach the processing ability of Computer China Chess system. Multi-processor parallel calculator and task scheduling brings forward a difficult problem for the Computer China Chess system. The game hardware structure of multi-processor system is presented based on the history of Computer Chess and representative system structure of Computer Chess. We focus on a feasible scheme on DSP and FPGA. based on the game hardware system structure and game task, a scheduling algorithm is introduced in the paper. |
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| Keywords: | game hardware system multiprocessor system task scheduling algorithm digital signal processor |
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