基于FPGA的32位整数微处理器的设计与实现

CPU“软核”可以根据实际应用需要进行剪裁，因而CPU软核设计是soC设计实现的重要部分．在FPGA内部设计和调试完全嵌入式的整数微处理器软核，不仅涉及到通常CPU必需的算术逻辑累加器、寄存器堆、指令缓冲、跳转计数、指令集及指令编译等方面的设计实现，还要针对FPGA内部的结构特点对设计进行分析优化，例如流水线结构的选择、关键路径延迟的折衷平衡以及整体调试等．在Virtex1000FG680-4FPGA上设计实现的32位RISC整数微处理器，运行时钟频率可达30MHz，实现150条指令，占用FPGA逻辑资源7％．

Design and Implementation of 32-bit Integral Microprocessor Based on FPGA

The design and implementation of CPU soft-core is necessary for SoC design since the soft-core can be tailored to fit actual applications. A 32-bit RISC integral microprocessor soft-core that is fully embedded in FPGA is described, including the design of hardware structure, instruction set and a simple assembler. According to the architecture of the aimed FPGA, the design of pipeline structure and critical path delay balancing are optimized. Some debugging techniques used are also discussed at the end of the paper. On Xilinx Virtex1000FG680-4, the designed microprocessor running clock is 30MHz with 150 instructions. The core occupies 7% FPGA logic resource.