基于函数级FPGA原型的硬件内部进化

电路进化设计是现阶段可进化硬件（EHW）研究的重点内容，针对制约进化设计能力的主要“瓶颈”，该文提出并讨论了一种简洁高效的内部进化方法，包括基于函数变换的染色体高效编码方案，与之配套的函数级FPGA原型和进化实验平台以及在线评估与遗传数自适应方法等，交通灯控制器，4位可级联比较器等相对复杂且具应用价值的电路的成功进化，证明该方法适用于组合，时序电路的进化设计，并可显著地减少运算量，提高进化设计的速度和规模。

Intrinsic Hardware Evolution Based on a Prototype of Function Level FPGA

Although evolvable hardware(EHW)promises to provide an entirely new approach to complex electronic circuit design and new adaptive hardware,most of EHW work concentrates on evolutionary design of electronic circuits,which is faced with a lot of problems.In order to loosen some bottlenecks restricting the speed and scale of evolutionary design,such as high computational cost and low speed of fitness evaluation,we present an intrinsic evolution technique with a detailed discussion.The technique mainly includes three parts:an efficient chromosome representation scheme using function transform,a relevant intrinsic evolution test bed comprising a prototype of function level field programmable gate array,and methods of online fitness evaluation and genetic parameter self adaption.On the basis of minimal term expression of logical functions,the new representation scheme can be expected to reduce the length of chromosome by a factor of n ,where n is the number of inputs.Based on a RAM look up table,the prototype of function level FPGA matches the representation scheme very well,and is suitable for implementation of various kinds of medium scale combinatorial and sequential logic functions.Designed as a PC extended card,the test bed supports partial reconfiguration of the prototype and online evaluation.Moreover,probabilities of crossover and mutation were allowed to adapt to changes in average fitness of population so as to quicken the convergence of evolution.The experimental results on some rather difficult but valuable design tasks,such as 4 bit extensible binary comparator and traffic light controller(a 4 state finite state machine),show us that much improvement is made in computational cost,evolution speed and evolvable scale of circuits.