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SMA:前瞻性多线程体系结构
引用本文:肖刚,周兴铭,徐明,邓鹍.SMA:前瞻性多线程体系结构[J].计算机学报,1999,22(6):582-590.
作者姓名:肖刚  周兴铭  徐明  邓鹍
作者单位:国防科学技术大学并行与分布处理国家重点实验室,长沙,410073
摘    要:提出了一种新的ILP处理器体系结构-前瞻性多线程体系的结构,简称SMA.它结合了前瞻性执行机制和多线程执行机制,以整个线程为长步进行前瞻性执行,多个线程并行执行并且共享处理器硬件资源,这样,处理器既通过组合每个线程的指令窗口形成一个大的动态指令窗口,开发出程序中更大的ILP,又利用多线程执行机制屏蔽各种长延迟操作,达到较高的资源利用率;介绍了SMA执行模型,并讨论了SMA处理器的实现和其中的关键技

关 键 词:超标量  前瞻性执行  多线程  寄存器重命名
修稿时间:1998年5月12日

SMA: A SPECULATIVE MULTITHREADED ARCHITECTURE
XIAO Gang,ZHOU Xing-ming,XU Ming,Deng Kun.SMA: A SPECULATIVE MULTITHREADED ARCHITECTURE[J].Chinese Journal of Computers,1999,22(6):582-590.
Authors:XIAO Gang  ZHOU Xing-ming  XU Ming  Deng Kun
Abstract:Most processors improve their performance by exploiting instruction level parallelism in program, called ILP processors. This paper puts forward a new architecture for ILP processor, speculative multithreaded architecture, shortly SMA. It combines the speculative execution and multithreading. Every time, a whole thread is predicted and speculatively executed. Multiple threads execute in parallel to share the processor resources. By this way, more ILP can be exploited and the utilization of the function units in the processor increases. High performance can be expected in SMA. This paper presents the philosophy of the SMA architecture, discusses the implementation and key technologies of the SMA processor. These technologies include thread control, distributed register renaming, instruction issue and execution, exception handling and compiler requirement. Experimental results about the performance of the SMA are also presented. The results show that it could reach high ILP performance for different program structures. If optimized compiler and better thread predicator are used, performance can reach higher.
Keywords:Superscalar  speculative execution  multithreading  register renaming  
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