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支持平台设计方法的系统芯片协同设计环境
引用本文:熊志辉,李思昆,陈吉华,王海力,边计年.支持平台设计方法的系统芯片协同设计环境[J].计算机辅助设计与图形学学报,2005,17(7):1401-1406.
作者姓名:熊志辉  李思昆  陈吉华  王海力  边计年
作者单位:1. 国防科学技术大学信息系统与管理学院,长沙,410073;国防科学技术大学计算机学院,长沙,410073
2. 国防科学技术大学计算机学院,长沙,410073
3. 清华大学计算机科学与技术系,北京,100084
基金项目:国家自然科学基金(90207019),国家“八六三”高技术研究发展计划(2002AA1Z1480)
摘    要:面向基于平台的设计方法,开发了系统芯片软/硬件协同设计环境YH—PBDE.在描述YH-PBDE的总体结构之后,详细介绍了该环境中的三个设计层次与二次映射过程,重点论述了YH—PBDE中基于约束任务流图的系统建模方法、具有初始信息素的蚂蚁寻优软硬件划分算法和基于层次有向无环图的设计约束分配方法.结合具有录音功能的MP3播放器芯片的系统级设计方法,说明了在YH—PBDE中进行系统芯片软硬件协同设计的过程。

关 键 词:基于平台的设计  系统芯片(SoC)  软/硬件协同设计  系统重用

Co-design Environment Supporting Platform-Based System-on-Chip Design Methodology
Xiong Zhihui,Li Sikun,Chen Jihua,Wang Haili,BIAN Jinian.Co-design Environment Supporting Platform-Based System-on-Chip Design Methodology[J].Journal of Computer-Aided Design & Computer Graphics,2005,17(7):1401-1406.
Authors:Xiong Zhihui  Li Sikun  Chen Jihua  Wang Haili  BIAN Jinian
Affiliation:Xiong Zhihui1,2) Li Sikun2) Chen Jihua2) Wang Haili3) Bian Jinian3) 1)
Abstract:We developed a hardware?software co-design environment named YH-PBDE for platform-based System-on-Chip (SoC) design method. After introducing the overall structure of YH-PBDE, we describe the three design levels and two mapping processes in YH-PBDE. Besides, we explain some key techniques used, including system modeling method using Constrained Taskflow Graph (CTG), hardware?software partitioning based on ant algorithm with initial pheromone, and performance constraint assignment method based on Hierarchical Directed Acyclic Graph (HDAG). We show the working flow of YH-PBDE with a case study on the system level design of recording-enabled MP3 player SoC chip, and the experimental results indicate the effectiveness of this hardware?software co-design environment.
Keywords:platform-based design  System-on-Chip (SoC)  hardware?software co-design  system reuse
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